A company is looking for a FPGA/Silicon Validation Engineer 4.Key ResponsibilitiesDevelop automation scripts to extract metrics from Vivado implementation runsAutomate collection of timing, utilization, and quality metrics using TCL & PythonIntegrate metrics into existing data pipelines,databases, and data lakesRequired QualificationsHands-on experience with Vivado (AMD/Xilinx) and/or Quartus (Intel/Altera)Strong scripting expertise in Python and TCLSolid understanding of FPGA implementation flows and timing analysisExperience extracting and analyzing FPGA tool reportsProficiency in TCL for FPGA EDA Automation